26th
Dec
Microprocessor MCQ

Microprocessor MCQ

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  • 26th Dec, 2020
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Microprocessor MCQ Test

1) Which of the following interrupt is only edge sensitive?

  • A.  RST 7.5
  • B.  TRAP
  • C.  RST6.5
  • D.  RST 5.5

2) A mask programmed ROM is

  • A.  programmed at the time of fabrication
  • B.  programmed by the user
  • C.  erasable and programmable
  • D.  erasable electrically

3) When an 8085 microprocessor is reset, the address bus contains

  • A.  0000H
  • B.  002CH
  • C.  0043H
  • D.  003CH

4) Which of the data transfer is not possible in microprocessor

  • A.  memory to accumulator
  • B.  accumulator to memory
  • C.  memory to memory
  • D.  I/O device to accumulator

5) Consider the following registers: 1. Accumulator and flag register 2. B and C register 3. D and E register 4. H and L register Which of these 8-bit registers of 8085 microprocessor can be paired together to make a 16-bit register?

  • A.  1, 3 and 4
  • B.  2, 3 and 4
  • C.  1, 2 and 3
  • D.  1, 2 and 4
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6) The maximum number of seven segment displays that can be connected to 8279 is

  • A.  12
  • B.  16
  • C.  18
  • D.  8

7) What are the sets of commands in a program which are not translated into machine instructions during assembly process, called?

  • A.  Mnemonics
  • B.  Directives
  • C.  Identifiers
  • D.  Operands

8) Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran. Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran.

  • A. Both A and R are correct and R is correct explanation of A
  • B. Both A and R are correct but R is not correct explanation of A
  • C. A is correct R is wrong
  • D. A is wrong R is correct

9) The interrupt vector address for TRAP is

  • A.  0000H
  • B.  0024H
  • C.  0018H
  • D.  002CH

10) A high on RESET OUT signifies that

  • A.  all the registers of the CPU are being reset
  • B.  all the registers and counters are being reset
  • C.  all the registers and counters are being reset and this signal can be used to reset external support chip
  • D.  processing can begin when this signal goes high

11) While using a frequency counter for measuring frequency, two modes of measurement are possible: Period time Frequency mode There is a ‘cross-over frequency’ below which the period mode is preferred. Assuming the crystal oscillator frequency to be 4MHz, the crossover frequency is given by

  • A.  8 Mhz.
  • B.  2 Mhz.
  • C.  2 Khz.
  • D.  1Khz.

12) Bus Interface Unit (BIU) in 8086 performs the following functions:

  • A.  Instruction decoding.
  • B.  Instruction fetch.
  • C.  Arithmatic and Logic operations.
  • D.  All the above.

13) In 8086 the number of bytes which can be addressed directly is about

  • A. 1000
  • B. 10000
  • C. 100000
  • D. one million

14) In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations

  • A.  0FFF H and 0FFE H
  • B.  0FFE H and 0FFF H
  • C.  1000 H and 0FFF H
  • D.  1000 H and 1001 H

15) Identify the non-maskable interrupt from the following

  • A.  RST 7.5
  • B.  RST 6.5
  • C.  RST 5.5
  • D.  RST 4.5

16) When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are

  • A.  not affected
  • B.  always set
  • C.  always reset
  • D.  affected indicating specific conditions

17) If m is a power of 2, the number of select lines required for an m-input mux is:

  • A. m
  • B. 2^m
  • C. log2 (m)
  • D. 2*m

18) A 37 bit mantissa has an accuracy of

  • A. 6 decimal places
  • B. 8 decimal places
  • C. 10 decimal places
  • D. 11 decimal places

19) Circuit A is a 1-bit adder; circuit B is a 1 bit multiplier.[Hint: Construct the truth table for the adder and the multiplier]

  • A. Circuit A has more gates than circuit B
  • B. Circuit B has more gates than circuit A
  • C. Circuit A has the same number of gates as circuit B
  • D. None of the above

20) Which of the following instruction will never affect the zero flag?

  • A.  DCR R
  • B.  ORA R
  • C.  DCX Rp
  • D.  XRA R

21) In order to save accumulator value on the stack, which of the following instruction may be used

  • A.  PUSH PSW
  • B.  PUSH A
  • C.  PUSH SP
  • D.  POP PSW

22) Consider the following statements: Arithmetic Logic Unit (ALU) 1.Performs arithmetic operations 2.Performs comparisons. 3.Communicates with I/O devices 4.Keeps watch on the system Which of these statements are correct?

  • A.  1, 2, 3 and 4
  • B.  1, 2 and 3
  • C.  1 and 2 only
  • D.  3 and 4 only

23) What is SIM?

  • A.  Select interrupt mask.
  • B.  Sorting interrupt mask.
  • C.   Set interrupt mask.
  • D.  None of these.

24) A field programmable ROM is called

  • A.  MROM
  • B.  PROM
  • C.  FROM
  • D.  FPROM

25) The address bus of any microprocessor is always

  • A.  Unidirectional
  • B.  Bi-directional
  • C.  Either unidirectional or bi-directional
  • D.  None

26) In a microcomputer , the address of memory locations are binary numbers that identify each memory circuit where a byte is stored. If a microcomputer uses 20-bit address, then numbers of different memory locations are

  • A.  20
  • B.  220
  • C.  220-1
  • D.  220 - 1

27) MS Access is a DBMS software.

  • A. True
  • B. False

28) The data lines of 8085 microprocessor are multiplexed with

  • A.  higher order address lines
  • B.  lower order address lines
  • C.  status lines
  • D.  none of the above

29) The 8085 microprocessor enters into bus idle machine cycle whenever

  • A.  INTR interrupt is recognized
  • B.  RST 7.5 is recognized
  • C.  DAD RP instruction is executed
  • D.  none of the above

30) The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following?

  • A.  Clock cycle
  • B.  Memory cycle
  • C.  Machine cycle
  • D.  Instruction cycle

31) I)A total of about one million bytes can be directly addressed by the 8086 microprocessor II)8086 has thirteen 16-bit registers III)8086 has eight flags IV)Compared to 8086, the 80286 provides a higher degree of memory protection Which one of the statements given above are correct?

  • A.  2,3&4
  • B.  1,3 &4
  • C.  1,2 & 4
  • D.  1,2 & 3

32) Which of the following is not a general purpose peripheral?

  • A. I/O port
  • B. Programmable interrupt controller
  • C. Programmable CRT controller
  • D. Programmable interval timer

33) Identify the non-programmable interfacing device from the following

  • A.  8295.
  • B.  8257.
  • C.  8212.
  • D.  8255.

34) On receiving an interrupt from an I/O device, the CPU

  • A.  halts for a predetermined times
  • B.  hands over the control of address bus and data bus to the interrupting device
  • C.  branches off to the interrupt service routine immediately
  • D.  branches off to the interrupt serviceroutine after completion of the current instruction

35) Which of the following is type declaration statement in C?

  • A. int bar
  • B. s = s + 1
  • C. king = horse + 1
  • D. prin = prin * prin

36) DMA is used between

  • A.  microprocessor and I/O
  • B.  microprocessor and memory
  • C.  memory and I/O
  • D.  none

37) The multiplexing of address bus and data buses is used in

  • A.  all the microprocessors.
  • B.  depends on the internal architecture.
  • C.  never multiplexed.
  • D.  none of these.

38) Which one of the following circuits transmits two messages simultaneously in one direction

  • A.  Duplex
  • B.  Diplex
  • C.  Simplex
  • D.  Quadruplex

39) A good assembly language programmer should use general purpose registers rather than memory in maximum possible ways for data processing. This is because:

  • A.  Data processing with registers is easier than with memory
  • B.  Data processing with memory requires more instructions in the program than that with registers
  • C.  Of limited set of instructions for data processing with memory
  • D.  Data processing with registers takes fewer cycles than that with memory

40) Consider the following I) Sign flag II) Trap flag III) Parity flag IV) Auxiliary carry flag. Which one of the above flags is/are present in 8085 microprocessor?

  • A.  (I) only
  • B.  (I) & (II)
  • C.  (II) & (III)
  • D.  (I) ,(III) & (IV)

41) In one’s complement 8 bit representation 11111111 represents

  • A. +0
  • B. -0
  • C. +1
  • D. -1

42) Of the following circuits, the one which involves storage is

  • A. RS Latch
  • B. Mux
  • C. Nand
  • D. Decoder

43) HLDA signal in 8085 performs the following operation:

  • A.  Indicates that another master is requesting the use of the address and data buses.
  • B.  Indicates that the CPU has received the HOLD request and that it will relinquish the bus in the next clock cycle.
  • C.  Indicates that the CPU has not received the HOLD request.
  • D.  Hold the data in the accumulator until the microprocessor is turned OFF.

44) Which of the following pair of gates can form a latch?

  • A. A pair of cross coupled OR
  • B. A pair of cross copled AND
  • C. A pair of cross coupled NAND
  • D. A cross coupled NAND/OR

45) Which one of the following statement is false?

  • A.  A microprocessor has bi-directional address bus
  • B.  A microprocessor has unidirectional address bus
  • C.  A microprocessor has bi-directional data bus
  • D.  A microprocessor has an ALU

46) In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location

  • A.  0000H
  • B.  002CH
  • C.  0034H
  • D.  003CH

47) An 8-bit microprocessor can have ………….. address lines.

  • A.  8
  • B.  16
  • C.  32
  • D.  cannot be predicted

48) A microprocessor is ALU

  • A.  and control unit on a single chip.
  • B.  and memory on a single chip.
  • C.  register unit and I/O device on a single chip.
  • D.  register unit and control unit on a single chip.

49) ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line.

  • A.  RIM
  • B.  SIM
  • C.  EI
  • D.  DI

50) Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be

  • A.  00000100
  • B.  01000000
  • C.  11000100
  • D.  010001000

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