30th
Jul
Computer Architecture MCQ

Computer Architecture MCQ

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  • 30th Jul, 2020
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Computer Architecture MCQ Quiz

1) The constant can be declared using ___________ directive.

  • A. PLACE
  • B. DC
  • C. CONS
  • D. DATAWORD

2) The PC is incorporated with the help of general purpose registers.

  • A. false
  • B. true

3) RISC stands for.....

  • A. Reduced Induction Set Computer
  • B. Restricted Instruction Sequencing Computer
  • C. Restricted Instruction Sequential Compiler
  • D. Reduced Instruction Set Computer

4) The situation wherein the data of operands are not available is called ______

  • A. Stock
  • B. Deadlock
  • C. Data hazard
  • D. Structural hazard

5) The starting address is denoted using _________ directive.

  • A. PLACE
  • B. ORG
  • C. EQU
  • D. ORIGIN

6) The set of loosely connected computers are called as.....

  • A. LAN
  • B. Workstation
  • C. Cluster
  • D. WAN

7) The main importance of ARM micro-processors is providing operation with.....

  • A. Lower error or glitches
  • B. Low cost and low power consumption
  • C. Efficient memory management
  • D. Higher degree of multi-tasking

8) To compute the direction of the branch the VLIW uses.....

  • A. Seekers
  • B. Direction counter
  • C. Heuristics
  • D. Compass

9) The floating point numbers are stored in general purpose register in IA-32.

  • A. True
  • B. False

10) In the client server model of the cluster _________ approach is used:

  • A. Bankers algorithm
  • B. Round robin
  • C. Load configuration
  • D. FIFO

11) ARM stands for.....

  • A. Advanced RISC Machines
  • B. Aviary Running Machines
  • C. Artificial Running Machines
  • D. Advanced Rate Machines

12) VLIW stands for?

  • A. Very Long Instruction Width
  • B. Very Large Instruction Word
  • C. Very Long Instruction Word
  • D. Very Long Instruction Width

13) During the execution of the instructions, a copy of the instructions is placed in the ______

  • A. System heap
  • B. RAM
  • C. Cache
  • D. Register

14) Each computer in a cluster is connected using:

  • A. Rj-45
  • B. STP
  • C. UTP
  • D. Coaxial cable

15) The main difference between the VLIW and the other approaches to improve performance is ___________

  • A. Lack of complex hardware design
  • B. Cost effectiveness
  • C. Increase in performance
  • D. none

16) The important feature of the VLIW is:

  • A. Cost effectiveness
  • B. ILP
  • C. Performance
  • D. All of the above

17) ARM processors where basically designed for _______

  • A. Mobile systems
  • B. Distributed systems
  • C. Super computers
  • D. Main frame systems

18) The time lost due to the branch instruction is often referred to as:

  • A. Delay
  • B. Branch penalty
  • C. Latency
  • D. none

19) The software which governs the group of computers is:

  • A. Interface UI
  • B. Distributor
  • C. Driver Rd45
  • D. Clustering middleware

20) Any condition that causes a processor to stall is called as:

  • A. Page fault
  • B. Hazard
  • C. System error
  • D. none of the mentioned

21) A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______

  • A. Pipe-lining
  • B. Super-scaling
  • C. Parallel Computation
  • D. none

22) The computer cluster architecture emerged as a result of _________

  • A. Super computers
  • B. ISA
  • C. Distributed systems
  • D. Workstation

23) To allocate a block of memory we use ___________ directive.

  • A. DS
  • B. PLACE
  • C. DATAWORD
  • D. RESERVE

24) The clock rate of the processor can be improved by:

  • A. Reducing the amount of processing done in one step
  • B. Improving the IC technology of the logic circuits
  • C. By using the overclocking method
  • D. All of the above

25) The Floating point registers of IA-32 can operate on operands up to:

  • A. 80 bit
  • B. 64 bit
  • C. 128 bit
  • D. 256 bit

26) The periods of time when the unit is idle is called as :

  • A. Hazards
  • B. Stalls
  • C. Bubbles
  • D. Both Stalls and Bubbles

27) The address system supported by ARM systems is....

  • A. Little Endian
  • B. Big Endian
  • C. X-Little Endian
  • D. Both Little & Big Endian

28) As the instructions can deal with variable size operands we use ____________ to resolve this.

  • A. Special assemblers
  • B. Delimiter
  • C. Size indicator mnemonic
  • D. none

29) The contention for the usage of a hardware device is called:

  • A. Stalk
  • B. Deadlock
  • C. Structural hazard
  • D. None of these

30) The addressing method used in IA-32 is.....

  • A. Little Endian
  • B. Big Endian
  • C. X-Little Endian
  • D. Both Little and Big Endian

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